EE 316 Lab 4
Design a counter which counts in the sequence that has been assigned to you. Use D flip-flops and NAND gates. Simulate your design using SimUaid.
(b) 000, 011, 101, 111, 010, 110, (repeat) 000, …
- Write down the steps involved to asynchronously set/reset the FlipFlop outputs to the two states not present in your assigned counter sequence. Your solution should also mention of the step(s) required to bring the Flipflop out of the asynchronous set/reset mode of operation. Assume a flipflop with active low set and reset inputs is available.
- Change the reset pin to 0 and the set pin to 1 - asynchronous state
- States not present in my counter sequence: 001 and 100
- To bring the flip-flop out of the asynchronous mode, change reset pin to 1 and set pin to 0
- Draw a state graph for your circuit. Your solution should have all states (including the ones not present in your assigned counter sequence).
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